Charles U. Farley

2 years ago • •

Charles U. Farley
2 years ago • •

Tiny RISC-V in FPGA

The smallest #RISCV implementation. It's bit-serial!

SERV

An introduction to SERV, the open source bit-serial RISC-V CPU that claims to be the world's smallest RISC-V CPU. Contains a quick-dive into bit-serial architectures, short history and an overview of what SERV is good for and where it is used

^{Diode Zone}

#riscv

⇧